Chipotle SoC Verification System
CHIPOTLE is an ASIC/FPGA verification environment for SoC designs. It is also an extension to the C programming language that will enable us to write C-programs to verify SoC designs for both RTL and netlist implementations.
Every SoC design implemented in an ASIC or FPGA has one or more embedded processors. These processors are running programs that are mostly written in C or C++ which controls the operation of the SoC. To create a RTL verification environment we have to came up with a method to write, compile, load and execute programs in a simulation environment. When having C programs running in the simulation setup we can then start extending these programs using the Chipotle test language. By adding the special test instruction defined in the Chipotle test language we can write programs to verify the complete SoC design.
The Chipotle test language can easily be extended with special instructions to control input ports and check output ports in the ASIC/FPGA design. Test instruction can also be added to activate test generators and test recorders. These test instructions are monitored and converted to commands executed in the Verilog test bench that will enable the different tests functions. For more information about Chipotle you can study these two documents:
Chipotle Test Language Description
Writing C-programs to verify a SoC design
Here is an example of Chipotle c-program to test a GPIO block: